PPT ON AVR INTRODUCTION

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AVR INTRODUCTION  Presentation Transcript

1.AVR INTRODUCTION

2.What is AVR ?
Modified Harvard architecture 8-bit RISC single chip microcontroller
Complete System-on-a-chip
On Board Memory (FLASH, SRAM & EEPROM)
On Board Peripherals
Advanced (for 8 bit processors) technology
Developed by Atmel in 1996
First In-house CPU design by Atmel

3.AVR Family
8 Bit tinyAVR
Small package – as small as 6 pins
8 Bit megaAVR
Wide variety of configurations and packages
8 / 16 Bit AVR XMEGA
Second Generation Technology
32 Bit AVR UC3
Higher computational throughput

4.AVR Architecture

5.What is RISC?
Reduced Instruction Set Computer
As compared to Complex Instruction Set Computers, i.e. x86
Assumption: Simpler instructions execute faster
Optimized most used instructions
Other RISC machines: ARM, PowerPC, SPARC
Became popular in mid 1990s

6.Characteristics of RISC Processors
Faster clock rates
Single cycle instructions (20 MIPS @ 20 MHz)
Better compiler optimization
Typically no divide instruction in core

7.AVR Register File
32 8 Bit registers
Mapped to address 0-31 in data space
Most instructions can access any register and complete in one cycle
Last 3 register pairs can be used as 3 16 bit index registers
32 bit stack pointer

8.AVR Memories

9.Memory Mapped I/O Space
I/O registers visible in data space
I/O can be accessed using same instructions as data
Compilers can treat I/O space as data access
Bit manipulation instructions
Set/Clear single I/O bits    
Only work on lower memory addresses

10.ALU – Arithmetic Logic Unit
Directly connected to all 32 general purpose registers
Operations between registers executed within a single clock cycle
Supports arithmetic, logic and bit functions
On-chip 2-cycle Multiplier

11.Instruction Set
131 instructions
Arithmetic & Logic
Branch
Bit set/clear/test
Data transfer
MCU control

12.Instruction Timing
Register ? register in 1 cycle
Register ? memory in 2 cycles
Branch instruction 1-2 cycles
Subroutine call & return 3-5 cycles
Some operations may take longer for external memory

13.Interrupts
ATmega328 has 26 reset/interrupt sources
1 Reset source
2 External interrupt sources
I/O Pin state change on all 24 GPIO pins
Peripheral device events

14.General Purpose IO Ports
Three 8 Bit IO Ports
Port B, Port C & Port D
Pins identified as PBx, PCx or PDx (x=0..7)
Each pin can be configured as:
Input with internal pull-up
Input with no pull-up
Output low
Output high

15.Alternate Port Functions
Most port pins have alternate functions
Internal peripherals use the alternate functions
Each port pin can be assigned only one function at a time

16.Alternate Pins for PDIP Package

17.Timer / Counters
8/16 Bit register
Increments or decrements on every clock cycle
Can be read on data bus
Output feeds waveform generator
Clock Sources
Internal from clock prescaler
External Tn Pin (Uses 1 port pin)

18.Multiple Operating modes
Simple timer / counter
Output Compare Function
Waveform generator
Clear/set/toggle on match
Frequency control
Pulse Width Modulation (PWM)

19.Timer / Counter  Block Diagram

20.USART
Universal Synchronous and Asynchronous serial Receiver and Transmitter
Full Duplex Operation
High Resolution Baud Rate Generator
Can provide serial terminal interface

21.ATmega Families
ATmega 48/88/168/328
What we have been talking about
ATmega 164/324/644/1284
JTAG interface
All 4 IO Ports A,B,C & D
More memory

22.PDIP – Plastic Dual In-line Package
Good for hobbyists
TQFP – Thin Quad Flat Pack
Surface mount
MLF – MicroLeadFrame
28 & 32 pin
Surface mount / higher temperature

23.References
www.atmel.com
www.polulu.com
http://winavr.sourceforge.net
www.avrfreaks.net
www.wrighthobbies.net
www.eclipse.org
Just Google AVR