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Inter Integrated Circuit Presentation Transcript
1.Inter-Integrated Circuit (I2C)
2.I2C Characteristics
Only 2 Wires Needed On Bus
Serial Data (SDA)
Serial Clock (SCL)
Multiple Devices Connected On Bus
Typically Limited (i.e. 8, 20, 27, 210,...?)
Similar Code For All I2C Peripherals
Supports Various Data Transfer Rates
Only 2 Wires Needed On Bus
Serial Data (SDA)
Serial Clock (SCL)
Multiple Devices Connected On Bus
Typically Limited (i.e. 8, 20, 27, 210,...?)
Similar Code For All I2C Peripherals
Supports Various Data Transfer Rates
3.Development of I2C
Version 1.0 Introduced in 1992
“Standard” 100 Kbits/s
“Fast” 400 Kbits/s
Version 2.0 Released in 1998
“High-Speed” 3.4 Mbits/s
Version 2.1 Released in 2000
Clock Stretched
“High-Speed” Timings Relaxed
Version 1.0 Introduced in 1992
“Standard” 100 Kbits/s
“Fast” 400 Kbits/s
Version 2.0 Released in 1998
“High-Speed” 3.4 Mbits/s
Version 2.1 Released in 2000
Clock Stretched
“High-Speed” Timings Relaxed
4.How Does It Work?
5.The I2C Bus
Inter-Integrated-Circuit or I2C (pronounced I-too-see or I-squared-see) is a synchronous serial protocol that uses a bi-directional data line and supports multiple slave devices controlled by a I2C bus master.
Defined by Phillips Semiconductor and became an industry standard.
The clock line is called SCL, the data line SDA
Inter-Integrated-Circuit or I2C (pronounced I-too-see or I-squared-see) is a synchronous serial protocol that uses a bi-directional data line and supports multiple slave devices controlled by a I2C bus master.
Defined by Phillips Semiconductor and became an industry standard.
The clock line is called SCL, the data line SDA
6.The I2C bus master generates SCL and initiates communication with one of the slave devices. Each device has a unique address for device selection.
A device address can be a combination of bits that are “hard-wired” into the chip design and one or more pins on the device. These pins can be wired High or Low to select an address that doesn’t conflict with other devices on the I2C bus.
Pull-up resistors are required on both the clock and data lines.
7.I2C Bus Configuration
A device address can be a combination of bits that are “hard-wired” into the chip design and one or more pins on the device. These pins can be wired High or Low to select an address that doesn’t conflict with other devices on the I2C bus.
Pull-up resistors are required on both the clock and data lines.
7.I2C Bus Configuration
8.I2C Protocol
9.1. Master sends start condition (S) and controls the clock signal
2. Master sends a unique 7-bit slave device address
3. Master sends read/write bit (R/W) – 0 - slave receive, 1 - slave transmit
4. Receiver sends acknowledge bit (ACK)
5. Transmitter (slave or master) transmits 1 byte of data
2. Master sends a unique 7-bit slave device address
3. Master sends read/write bit (R/W) – 0 - slave receive, 1 - slave transmit
4. Receiver sends acknowledge bit (ACK)
5. Transmitter (slave or master) transmits 1 byte of data
10.I2C Signals
Start – high-to-low transition of the SDA line while SCL line is high
Stop – low-to-high transition of the SDA line while SCL line is high
Ack – receiver pulls SDA low while transmitter allows it to float high
Data – transition takes place while SCL is slow, valid while SCL is high
Start – high-to-low transition of the SDA line while SCL line is high
Stop – low-to-high transition of the SDA line while SCL line is high
Ack – receiver pulls SDA low while transmitter allows it to float high
Data – transition takes place while SCL is slow, valid while SCL is high
11.I2C Features
“Clock stretching” – when the slave (receiver) needs more time to process a bit, it can pull SCL low. The master waits until the slave has released SCL before sending the next bit.
“General call” broadcast – addresses every device on the bus
10-bit extended addressing for new designs. 7-bit addresses all exhausted
12.AVR Support for I2C
Atmel calls it “Two-wire Serial Interface” (or TWI)
Supported by all AVR 8-bit µC except ATTiny and AT90
ATmega323 TWI mode when TWEN in TWCR is set:
PC0=SCL, PC1=SDA
TWBR – sets bit rate
TWCR – controls start, stop, ack generation, indicates M/S, T/R
TWDR – contains byte transmitted/received
TWAR – contains slave address
TWSR – indicates status of TWI Bus (start condition
transmitted, ACK received, … 26 total states)
“Clock stretching” – when the slave (receiver) needs more time to process a bit, it can pull SCL low. The master waits until the slave has released SCL before sending the next bit.
“General call” broadcast – addresses every device on the bus
10-bit extended addressing for new designs. 7-bit addresses all exhausted
12.AVR Support for I2C
Atmel calls it “Two-wire Serial Interface” (or TWI)
Supported by all AVR 8-bit µC except ATTiny and AT90
ATmega323 TWI mode when TWEN in TWCR is set:
PC0=SCL, PC1=SDA
TWBR – sets bit rate
TWCR – controls start, stop, ack generation, indicates M/S, T/R
TWDR – contains byte transmitted/received
TWAR – contains slave address
TWSR – indicates status of TWI Bus (start condition
transmitted, ACK received, … 26 total states)
13.I2C Tradeoffs
Advantages:
Good for communication with on-board devices that are accessed occasionally.
Easy to link multiple devices because of addressing scheme
Cost and complexity do not scale up with the number of devices
Disadvantages:
The complexity of supporting software components can be higher than that of competing schemes ( for example, SPI ).
Advantages:
Good for communication with on-board devices that are accessed occasionally.
Easy to link multiple devices because of addressing scheme
Cost and complexity do not scale up with the number of devices
Disadvantages:
The complexity of supporting software components can be higher than that of competing schemes ( for example, SPI ).
14.I2C START and STOP
15.I2C Write Sequence
16.I2C Read Sequence
Reading an I2C Slave device usually begins by writing to it. You must tell the chip which internal register you want to read.
I2C Read Sequence
Send the START condition
Send the device address with R/W held Low (for a Write)
Send the number of the register you want to read
Send a repeated START condition
Send the device address with R/W set High (for a Read)
Read the data byte from the slave
Send the STOP sequence
Reading an I2C Slave device usually begins by writing to it. You must tell the chip which internal register you want to read.
I2C Read Sequence
Send the START condition
Send the device address with R/W held Low (for a Write)
Send the number of the register you want to read
Send a repeated START condition
Send the device address with R/W set High (for a Read)
Read the data byte from the slave
Send the STOP sequence
17.I2C Read example using device address 1100000 and reading register number 1.
18.I2C Programming on the BASIC Stamp
19.The I2COUT Instruction
Syntax: I2COUT pin, slaveID, address, OutputData
pin specifies SDA and can only be 0 or 8. SCL will then be pin 1 or 9.
slaveID is the slave device address
address is the register address within the slave device
OutputData is the data to write to the I2C slave device
The I2COUT instruction automatically sets the R/W bit.
The I2COUT instruction supports multiple address bytes which may be required for some slave devices. See the PBASIC Help for details.
Syntax: I2COUT pin, slaveID, address, OutputData
pin specifies SDA and can only be 0 or 8. SCL will then be pin 1 or 9.
slaveID is the slave device address
address is the register address within the slave device
OutputData is the data to write to the I2C slave device
The I2COUT instruction automatically sets the R/W bit.
The I2COUT instruction supports multiple address bytes which may be required for some slave devices. See the PBASIC Help for details.
20.The I2CIN Instruction
Syntax: I2CIN pin, slaveID, address, InputData
pin specifies SDA and can only be 0 or 8. SCL will then be pin 1 or 9.
slaveID is the slave device address
address is the register address within the slave device
InputData is the data read from the I2C slave device
The I2IN instruction automatically sets the R/W bit.
The I2IN instruction supports multiple address bytes which may be required for some slave devices. See the PBASIC Help for details.
Syntax: I2CIN pin, slaveID, address, InputData
pin specifies SDA and can only be 0 or 8. SCL will then be pin 1 or 9.
slaveID is the slave device address
address is the register address within the slave device
InputData is the data read from the I2C slave device
The I2IN instruction automatically sets the R/W bit.
The I2IN instruction supports multiple address bytes which may be required for some slave devices. See the PBASIC Help for details.
21.Other Synchronous Serial Protocols
Several IC manufacturers have developed their own protocols for synchronous serial communication. The data sheets and application notes from the chip manufacturer should be consulted for design and troubleshooting tips.
A few popular serial I/O protocols
MICROWIRE (National Semiconductor)
SPI (serial peripheral interface from Motorola)
OneWire (Dallas Semiconductor)
Several IC manufacturers have developed their own protocols for synchronous serial communication. The data sheets and application notes from the chip manufacturer should be consulted for design and troubleshooting tips.
A few popular serial I/O protocols
MICROWIRE (National Semiconductor)
SPI (serial peripheral interface from Motorola)
OneWire (Dallas Semiconductor)
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